A common occurrence in digital electronic systems is the requirement to transfer data between two asynchronous systems, that is, two systems which have independent clocks and are therefore not synchronized with each other. A common method used in the past to transfer such data is to use a first in, first out (FIFO) serial memory in which data from the transmitting system is written into the serial memory at the transmitting system's clock rate and read from the serial memory at the receiving system's clock rate. This FIFO memory generally uses a dual port memory cell so that data can be written into each memory cell independently of the data being read out of the memory cell.
However, this FIFO system is useful only for the transmission of data in one direction only and is, therefore, not suitable for interfacing between two systems in which data is to be transferred in both directions. In certain situations this bidirectional transfer of data can most advantageously be accomplished using a common memory between the two systems in which each system can both write data into the memory and read data from the memory at their own independent clock rates.
Therefore, it can be appreciated that a shared memory system which permits two asynchronous systems to both write data into the memory and read data from the memory is highly desirable.